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Content archived on 2024-04-15

Parallel Computer Systems for Integrated Numeric and Symbolic Processing

Objective

The objective of SPAN was to investigate programming languages and parallel architectures for the integration of symbolic and numeric processing, and to develop a common virtual machine. The project was organised into distinct layers: application softwarepackages; high-level languages and tools; the "virtual machine" kernel system; and parallel architectures.
The kernel system comprises an intermediate representation, currently implemented by a target machine language (TML) and its associated virtual machine code (VMC), through which all high-level languages were to be compiled onto a range of architectures for execution. It formed a focal point of the project. Two high-level language compilers were to be produced, together with an object-oriented framework for language integration. Three types of parallel architecture were to be evaluated, and an investigation was to be conducted into novel VLSI architectures for efficient execution of the VMC. To demonstrate the utility of these techniques, a range of applications software was to be developed.
The development work is divided into 3 areas:
a 1800 x 2400 high resolution graphics board compatible with an IBM XT/AT bus;
a system for digitising, storing and visualisation of images with 512 x 512 pixel resolution, 8-bit quantified;
a system which makes an analysis of linear discrete systems taking the graph as an input and drawing frequency response curves (with the possibility of generating code for the signal processor TMS 320).

The objective was to investigate programming languages and parallel architectures for the integration of symbolic and numeric processing, and to develop a common virtual machine. The project was organized into distinct layers: application software packages; high level languages and tools; the virtual machine kernel system; and parallel architectures. The kernel system comprises an intermediate representation, currently implemented by a target machine language (TML) and its associated virtual machine code (VMC), through which all high level languages were compiled onto a range of architectures for execution. It formed a focal point of the project. Two high level lanaguage compilers were produced, together with an object oriented framework for language integration. Three types of parallel architecture were evaluated, and an investigation was conducted into novel very large scale integration VLSI architectures for efficient execution of the VMC. To demonstrate the utility of these techniques, a range of applications software was developed. Work was undertaken in parallel lanaguage definition and architectures, and in the 4 application areas of image interpretation, real time expert systems, partial differential equation solvers, and parallel relational database management systems DBMS. Evaluation of the applications on Supernode and other architectures was performed.
Work was undertaken in parallel language definition and architectures, and in the four application areas of image interpretation, real-time expert systems, partial differential equation solvers, and parallel relational DBMS. Evaluation of the applicationson Supernode and other architectures was performed.
Exploitations
The project has achieved significant results in the area of virtual machine definition, compilers for parallel systems, object-oriented frameworks and investigations into several architectures. Hardware implementations have also been produced.

Topic(s)

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Call for proposal

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Funding Scheme

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Coordinator

Central Research Laboratories plc
EU contribution
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Address
Dawley Road
UB3 1HH Hayes
United Kingdom

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Total cost
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Participants (5)