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Chiplet-based Hardware Architectures for Software-defined Vehicles

Project description

Chiplet-based hardware architectures for software-defined vehicles

Chiplet-based systems-on-chip (SoCs) are modern, modular processors composed of interconnected functional building blocks like central processing units, hardware accelerator units and memory on smaller, separate silicon dies (chiplets). This enables manufacturers to mix and match technologies, scale manufacturing quickly and easily, and significantly reduce costs compared to traditional monolithic (single-die) chips. The EU-funded CHASSIS project aims to establish a collaborative ecosystem for chiplet-based SoCs for high-performance computing automotive applications to power the next generation of electrified, connected and autonomous vehicles. CHASSIS will cover the value chain of chiplet-based SoCs, bringing together partners from research and industry and ensuring multi-vendor compatibility. The collaboration will also strengthen Europe’s semiconductor sector and its independence.

Objective

The CHASSIS (Chiplet-based Hardware Architectures for Software-defined Vehicles) project aims to transform the automotive and semiconductor industries by establishing a flexible, open, and collaborative ecosystem for chiplet-based System-on-Chips (SoCs). This initiative supports the development of next-generation vehicles focused on electrification, connectivity, and autonomy while strengthening Europe’s position in the global semiconductor market and reducing reliance on non-European suppliers. CHASSIS seeks to create a sustainable, interoperable platform for automotive applications, fostering innovation, competitiveness, and strategic autonomy in semiconductor manufacturing.

The project spans the entire lifecycle of chiplet-based SoCs, from requirements definition and architecture design to hardware/software co-development, system integration, and validation. By bringing together industrial semiconductor partners, European OEMs, and leading RTOs, CHASSIS aims to develop multi-vendor chiplet-based SoCs for high-performance computing (HPC) automotive applications. This collaborative approach ensures seamless integration, openness, and multi-vendor compatibility, while leveraging outcomes from imec’s Automotive Chiplet Program (ACP) and aligning with other European initiatives like EU RISC-V and HAL4SDV.

CHASSIS will deliver substantial benefits, including:
- Industrial Competitiveness
- Economic Growth
- Advancing Research
- Sustainability
- Policy Alignment

Ultimately, CHASSIS aims to establish Europe as a global leader in chiplet-based SoC technologies, driving innovation, creating jobs, and ensuring a resilient semiconductor supply chain. Its scalable, modular, and secure framework for Software-Defined Vehicles (SDVs) will benefit automotive OEMs, Tier-1 suppliers, and the semiconductor industry, with broader impacts across sectors like aerospace, robotics, and industrial automation.

Keywords

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Programme(s)

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Topic(s)

Calls for proposals are divided into topics. A topic defines a specific subject or area for which applicants can submit proposals. The description of a topic comprises its specific scope and the expected impact of the funded project.

Funding Scheme

Funding scheme (or “Type of Action”) inside a programme with common features. It specifies: the scope of what is funded; the reimbursement rate; specific evaluation criteria to qualify for funding; and the use of simplified forms of costs like lump sums.

HORIZON-JU-IA - HORIZON JU Innovation Actions

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Call for proposal

Procedure for inviting applicants to submit project proposals, with the aim of receiving EU funding.

(opens in new window) HORIZON-JU-CHIPS-2025-IA-HPA

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Coordinator

ROBERT BOSCH GMBH
Net EU contribution

Net EU financial contribution. The sum of money that the participant receives, deducted by the EU contribution to its linked third party. It considers the distribution of the EU financial contribution between direct beneficiaries of the project and other types of participants, like third-party participants.

€ 4 272 839,06
Address
ROBERT-BOSCH-PLATZ 1
70839 Gerlingen-Schillerhoehe
Germany

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Region
Baden-Württemberg Stuttgart Ludwigsburg
Activity type
Private for-profit entities (excluding Higher or Secondary Education Establishments)
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Total cost

The total costs incurred by this organisation to participate in the project, including direct and indirect costs. This amount is a subset of the overall project budget.

€ 17 091 356,25

Participants (20)

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