WP2 focused on device fabrication using two complementary approaches: one based on an industrial-scale 300-mm CMOS line leveraging well-established silicon-on-insulator nanowire transistor technology; one using a more flexible cleanroom enabling faster fabrication cycles (we could attain a lead time of one month for a customized process with two levels of overlapping gates gate). For both cases we designed dedicated mask sets and engaged in a long-lasting process development. The devices were pre-screened at room temperature and then dispatched to the partners for low-temperature experimental investigation (WP3-4). Finally, WP2 included some efforts to develop CMOS-compatible superconducting and ferromagnetic elements for spin manipulation and readout.
WP3 focused on investigating the low-temperature electronic properties of silicon devices and their ability to embody spin-qubit functionality. We observed sufficiently high charge stability and, in the case of electron quantum dots, fairly deterministic gate-induced electrostatic confinement allowing us to consistently tune dot occupation down to the last electron. For quantum dots confining holes, however, reproducibility turned out to be rather low denoting a larger amount of disorder. Despite that, hole quantum dots allowed us to obtain the first demonstration of a spin qubit issued from an industrial-level CMOS fabrication line. Their main advantage lies in the intrinsically strong spin-orbit coupling, which enables coherent spin rotations by means of a gate-voltage rf pulse. Finally, significant efforts were devoted to developing and optimizing spin readout techniques based on rf gate reflectometry.
WP4 focused on establishing and demonstrating methods to manipulate and readout single spin states in silicon nanodevices, which are compatible with high-density spin qubit arrays. We investigated: i) local control through electric field tuning or driving of spin qubits; ii) two alternative ways to generate rf magnetic fields for global spin-qubit control, i.e. 3D microwave cavities and microwave striplines running above the qubit devices; iii) methods to mitigate the effects of cross-coupling and interference in multi-quantum-dot devices.
WP5 focused on studying and benchmarking different qubit implementations; investigating the effect of different noise sources to elaborate control sequences for qubit operations with maximal fidelity; investigating the impact of device scaling on qubit properties; we modeled the fields produced by cobalt micromagnets to be integrated with Si qubit devices; working out a complete description of the electrical manipulation of electron and hole qubits in the g-matrix formalism. Finally, we proposed an equivalent circuit to understand the interaction between double quantum dots and classical oscillators, a relevant aspect for dispersive readout.
WP6 focused on the development of cryogenic CMOS electronics. MOSFET characteristics were investigated down to a few degrees Kelvin and the results were used to build effective models for circuit design. We found that MOSFETs operate perfectly down to 4.2 K but their switching efficiency, related to the so-called sub-threshold slope, ceases to improve below 50 K. We provided plausible physical interpretations of this effect. Using approximate models, we designed cryogenic circuits useful for qubit readout and control: analog and digital multiplexers, circulators, voltage-controlled oscillators, low-noise amplifiers for qubit readout. Finally, by coupling quantum-dot devices to MOSFET transistors used as switches on gate-reflectometry readout lines, we took a first step toward the integration of classical and quantum devices.
Overall, MOS-QUITO has produced >55 publications, 7 patents, >130 conference presentations. We organized a Summer School on Quantum Computing (Cambridge, Sept. 11, 2019). Project website:
https://www.mos-quito.eu(si apre in una nuova finestra). Finally, MOS-QUITO has favored the development of further collaborative research in Europe (in particular, two granted ERC Synergy projects, “QuCube” and “NONLOCAL”, and a proposal for a large European initiative on silicon spin qubits within the Quantum Flagship program).
