The European Processor Initiative (EPI) is a project currently implemented under the first stage of the Framework Partnership Agreement (FPA: 800928), whose aim is to design and implement a roadmap for a new family of low-power European processors for extreme scale computing, high-performance Big-Data and a range of emerging applications. The first stage is the Special Grant Agreement of the European Processor Initiative (EPI-SGA1: 826647), which started in December 2018, aims to deliver a high-performance, low-power processor, implementing vector instructions and specific accelerators with high bandwidth memory access. The EPI processor, to be achieved within EPI-SGA1&2 will also meet high security and safety requirements. This will be achieved through intensive use of simulation, development of a complete software stack and tape-out in the most advanced semiconductor process node. SGA1 will provide a competitive chip that can effectively address the requirements of the HPC, AI, automotive and trusted IT infrastructure markets.
The EPI project is established as one of the cornerstones of this strategic plan – it gathers 28 partners from 10 European countries to develop the processor and ensure that the key competence of high-end chip design remains in Europe. European scientists and industry will be able to access exceptional levels of energy-efficient computing performance. Exascale systems will need to simultaneously meet challenges related to performance, system cost and energy-efficiency. SGA1 has used a holistic approach to refine the system architecture and its component specifications.
During the 3 years of EPI’s execution, SGA1 has worked towards fulfilling its objectives to a hybrid Exascale system developing:
- A novel, Exascale HPC-focused low-power processing system units (General Purpose Processor stream),
- An accelerator to increase energy efficiency for computing intensive tasks in HPC and AI (Accelerator stream),
- An automotive demonstration platform to test the relevance of the previous components in an automotive context paving the way for SGA2 (Automotive stream).
SGA1 has shared a strong set of common technology between these three different development streams. Starting with a co-design approach using a holistic strategy to match the application needs and the technical solutions implemented, defining the global architecture (hardware and software). A common design methodology has been established and a silicon process selected, 6nm for the General Purpose Processor and 22nm for the accelerator. Security is an essential topic and guidelines have been defined for all EPI products. A common and holistic approach for power management has been devised.
Starting from the selection of cutting-edge processor technology, a low-power design approach has been centered in the HW around massive parallelism, specialised architecture, low-voltage operating point and fine grain power management. The SW stack has been designed to integrate and take advantage of these features to achieve high-energy efficiency and maximise performance across a wide range of layers from the low level firmware, all the way up to system software and application run-times.
