Objective
Future successful development of information technologies is strongly dependent on the continuation of Moore's law towards nano-electronics. According to the ITRS roadmap, the mainstream memory devices, e.g. DRAMs and Flash memories, will face a technological brick-wall around 2006. An ideal memory device for the coming nano-electronics era would be a silicon-technology compatible flash single-electron memory device. The aim of this project is to optimise and fabricate such nano-flash single-electron memory devices and the associated circuits using a fully MOS-compatible SOI technology. The key innovative aspects of this project rely on device design optimised for persistent operation and low voltage programming, and on a simple self-aligned SOI-MOS process. This project gathers together 3 university partners and an industrial partner interested in the high potential of this study. Future successful development of information technologies is strongly dependent on the continuation of Moore's law towards nano-electronics. According to the ITRS roadmap, the mainstream memory devices, e.g. DRAMs and Flash memories, will face a technological brick-wall around 2006. An ideal memory device for the coming nano-electronics era would be a silicon-technology compatible flash single-electron memory device. The aim of this project is to optimise and fabricate such nano-flash single-electron memory devices and the associated circuits using a fully MOS-compatible SOI technology. The key innovative aspects of this project rely on device design optimised for persistent operation and low voltage programming, and on a simple self-aligned SOI-MOS process. This project gathers together 3 university partners and an industrial partner interested in the high potential of this study.
OBJECTIVES
The critical points that currently limit performances are lithography resolution, process optimisation, and fine characterisation. The objectives of SASEM are to address these points and go from the existing laboratory single-electron-memory (SEM) device to memory circuit demonstration. In order to fully exploit the potential of our SEM device, all aspects from physics and technology to circuit architecture will be addressed. Detailed objectives: Process simulation using appropriate models for small devices and anisotropic oxidation. Device simulation and design, process optimisation for best reproducibility and robustness to process parameter fluctuations, and best device characteristics. Tests and optimisation of critical process steps. Memory device fabrication. Physical characterisation. Electrical characterisation (programming and readout, retention time). Design and fabrication of memory cells. Demonstration of a nano-flash SEM circuit.
DESCRIPTION OF WORK
The different components are grouped in the following workpackages (WP1 to WP3) and tasks. WP1: Design and simulation:
1.1 Development of specific process simulation tools that will allow device process optimisation. If necessary, 3D simulation will be considered on year 2;
1.2 Device process optimisation based on inputs from 1.1 as well as feedbacks from device characterization (3.1 and 3.3). Technological parameters will be optimised to produce the best device in terms of reproducibility and robustness to process parameter fluctuations, as well as device characteristics;
1.3 Design of a programming/readout circuit using the SOI analog circuit expertise of G1. Design improvement is based on memory cell characterization (3.4);
1.4 Design of memory circuit based on output from task 1.3. Feedback from memory circuit characterization (3.5) will drive design optimisation.
WP2: Fabrication: 2.1 Optimisation of the key process steps: lithography and oxidation. Shared by CO1 (oxidation) and CR3 (lithography). Physical characterization (3.1) will drive the present task through continuous feedbacks;
2.2 Based on inputs from tasks 1.2 and 2.1 task 2.2 is devoted to memory device fabrication. CO1 and CR3 will share process steps according to specific expertises and equipments;
2.3 Memory cell fabrication;
2.4 Memory circuit fabrication based on input from task 1.4.
WP3: Characterization;
3.1 Physical characterization using various investigation tools (SEM, AFM, FIB). Device process optimisation;
3.2 Development of specific device/circuit characterization tools to provide detailed investigation of memory device characteristics;
3.3 to 3.5: Devices, memory cells and memory circuits characterization, respectively. Provide continuous feedback to tasks 1.2 1.3 and 1.4.
Fields of science (EuroSciVoc)
CORDIS classifies projects with EuroSciVoc, a multilingual taxonomy of fields of science, through a semi-automatic process based on NLP techniques. See: The European Science Vocabulary.
CORDIS classifies projects with EuroSciVoc, a multilingual taxonomy of fields of science, through a semi-automatic process based on NLP techniques. See: The European Science Vocabulary.
- engineering and technology electrical engineering, electronic engineering, information engineering electronic engineering analogue electronics
- natural sciences chemical sciences electrochemistry electrolysis
- natural sciences computer and information sciences software software applications simulation software
- engineering and technology nanotechnology nanoelectronics
- social sciences law
You need to log in or register to use this function
We are sorry... an unexpected error occurred during execution.
You need to be authenticated. Your session might have expired.
Thank you for your feedback. You will soon receive an email to confirm the submission. If you have selected to be notified about the reporting status, you will also be contacted when the reporting status will change.
Keywords
Project’s keywords as indicated by the project coordinator. Not to be confused with the EuroSciVoc taxonomy (Fields of science)
Project’s keywords as indicated by the project coordinator. Not to be confused with the EuroSciVoc taxonomy (Fields of science)
Programme(s)
Multi-annual funding programmes that define the EU’s priorities for research and innovation.
Multi-annual funding programmes that define the EU’s priorities for research and innovation.
Topic(s)
Calls for proposals are divided into topics. A topic defines a specific subject or area for which applicants can submit proposals. The description of a topic comprises its specific scope and the expected impact of the funded project.
Calls for proposals are divided into topics. A topic defines a specific subject or area for which applicants can submit proposals. The description of a topic comprises its specific scope and the expected impact of the funded project.
Call for proposal
Procedure for inviting applicants to submit project proposals, with the aim of receiving EU funding.
Data not available
Procedure for inviting applicants to submit project proposals, with the aim of receiving EU funding.
Funding Scheme
Funding scheme (or “Type of Action”) inside a programme with common features. It specifies: the scope of what is funded; the reimbursement rate; specific evaluation criteria to qualify for funding; and the use of simplified forms of costs like lump sums.
Funding scheme (or “Type of Action”) inside a programme with common features. It specifies: the scope of what is funded; the reimbursement rate; specific evaluation criteria to qualify for funding; and the use of simplified forms of costs like lump sums.
Coordinator
1348 LOUVAIN-LA-NEUVE
Belgium
The total costs incurred by this organisation to participate in the project, including direct and indirect costs. This amount is a subset of the overall project budget.